One proposed architecture for fabricating a solid state quantum computer (SSQC), involves an array of phosphorous-31 (31P) atoms embedded in a silicon matrix to provide the quantum bits (qubits). In this design1,2 the qubit information is encoded on the nuclear spin of the phosphorous atoms, which have a very long spin relaxation time at low temperatures. Interactions between qubits is mediated via the donor electrons associated with the phosphorous atoms, which can be conveniently controlled using gate electrodes. Alternatively the qubit information can simply be encoded on the electron spin3, although in this case the quantum computation is more susceptible to decoherence errors, as the electron spin relaxation time is much shorter that the nuclear spin relaxation time.
Qubit read-out in both nuclear spin1,2 and electron spin3 SSQC designs requires an ability to determine the spin state of a single electron. A method proposed by Kane1,4 uses a single electron transistor (SET) device near a pair of phosphorous atoms to determine the spin state of the resulting two-electron system, using the phenomenon of Pauli exclusion. Therefore a critical requirement of the nanoelectronic circuitry for the SSQC is the integration of conducting control gates (used to manipulate the nuclear or electronic spin of the qubit) in close proximity to SET devices (used to detect single charge displacement and so perform qubit read-out)1. SET devices can be conveniently fabricated from aluminium/aluminium oxide (Al/Al2O3) structures using a double-angle metal evaporation technique5,6. The control gates and SETs must also be aligned (or registered) to the underlying 31P donors, which constitute the qubits in the SSQC.
The sensitivity of SETs to charge motion between two locations can be increased by using two SETs, on either side of the region of interest, and correlating the output of the two devices. This approach was first applied in the study of Quantum Cellular Automata by Amlani et al.7 in 1997.